Research Focus
Currently, I am working within two research themes in the Computer Engineering laboratory. Within the MOLEN research theme, I am working on the micro-architecture of the MOLEN polymorphic processor (co-founder). Furthermore, I am developing an open-source paramterized and reconfigurable VLIW processor. This work is funded by the EU (the ERA project, coordinator) and is performed in close collaboration with several EU universities and companies. Within the ARACHNE research theme, I am working on network processing, collaborative grid computing. Currently, I am working on a new computing paradigm that combines modifiable firmware (microcode) and reconfigurable hardware with hardwired hardware, such as general-purpose superscalar processor cores.
During my PhD studies, I have been involved in research in computer architectures and parallel processors. More specifically, my focus was on architectural multimedia extensions for all mainstream and currently available processors. In particular, I worked on identifying possible candidates suited for parallelization and acceleration in hardware. An additional focus of my research has been the performance evaluation of reconfiguration schemes for reconfigurable hardware intended to support multimedia operations. In this evaluation process, I worked with a cycle-precise simulator and modified it extensively to suit performance evaluation purposes. Furthermore, manually editing the multimedia benchmark code in order to support the reconfiguration schemes was part of the process. In this process, I have also been involved in the implementation phase of reconfigurable hardware by utilizing synthesis and verification software. For my Master thesis, I worked on simulation and development of routing algorithms for a network of parallel processors arranged in a `clustered torus'-topology. The simulation framework allowed existing routing algorithms to be tested and has led to new algorithms.
Research Interests: Embedded Processors, Computer Architecture and Engineering, Chip Multiprocessors, Multithreading, Multimedia Processing and Processors, High-Performance Processing and Processors, Microprogramming, Reconfigurable Computing, Synthesis and Verification, Computer Design, Logic Design, Computer Aided Design, Parallel Processing, Interconnection Networks, Multimedia Benchmarking, Grid Computing, Collaborative and Distributed Computing.
Project involvements (current and past)
- Artemisia (NL STW)
- DDM-CMP (Cyprus government grant)
- Hartes (EU FP6 IP)
- VISIONS (EU FP6 STREP)
- ERA (EU FP7 STREP) - coordinator
Personal Collaborations (current and past)
Over the years, I have worked with many researchers. Here is a short list:
- Geoffrey Brown, Indiana University, USA
- Rainer Buchty, Universität Karlsruhe, Germany
- Luigi Carro, UFRGS, Brazil
- José Delgado-Frias, Washington State Univevsity, USA
- Nikitas Dimopoulos, University of Vicioria, Canada
- Paraskevas Evripidou, University of Cyprus, Cyprus
- Reza Hassanpour, Çankaya University, Turkey
- Wolfgang Karl, Universität Karlsruhe, Germany
- Walid Najjar, University of California Riverside, USA
- Andy Pimentel, University of Amsterdam, The Netherlands
- Todor Stefanov, Leiden University, The Nether1ands
- Mehmet Tolun, Çankaya University, Turkey
- Pedro Trancoso, University of Cyprus, Cyprus
- more coming...
Invited talks
- ADCOM Conference, India (2009)
- University of Rio de Janeiro, Brazil (2009)
- University of Sao Paolo, Brazil (2009)
- UFRGS, Brazil (2009) - EMICRO Symposium
- Linkoping University, Sweden (2009)
- Chinese University of Hong Kong, Hong Kong SAR (2008)
- Çankaya University, Turkey (2008)
- University of Cyprus, Cyprus (2006,2007)
- UFRGS, Brazil (2006) - EMICRO Symposium
Professional acitivities
Involvement in organizing the following conferences and workshops:
- WRC 2011 (General Chair)
- SAMOS 2010 (Steering Committee member)
- WRC 2010 (Program Co-Chair)
- ICCD 2009 (Financial Chair)
- SAMOS Workshop 2009 (General Co-Chair) - also Special Session Chair
- ARCS 2009 (Program Co-Chair)
- SAMOS Workshop 2008 (Program Co-Chair) - also Financial Chair
- WRC 2008 (Publicity Chair)
- DTIS 2007 (Financial Chair)
- FPL 2007 (Financial Chair)
- SAMOS Symposium 2007 (Financial & Publicity Chair)
- SAMOS Workshop 2006 (General Co-Chair) - also Financial & Publicity Chair
- ICS 2006 (Proceedings Chair)
- ASAP 2005 (Financial Chair)
Editorships:
- Proceedings of the SAMOS Workshop 2008
- Journal of Systems Architecture (Volume 53, Issue 10, October 2007)
- Proceedings of the Symposium: "The Future of Computing" (2007)
- Proceedings of the SAMOS Workshop 2006
Involvement as PC member in the following conferences and workshops:
- 2010: 2PARMA, FCST, FPL, RAW, SDR, FtMC
- 2009: ARC, ARCS, CF2009, PacRim, ReConfig, SAMOS, SIPS
- 2008: ARC, ARCS, FPL, HipHaC, SAMOS
- 2007: ARC, FPL, SAMOS
- 2006: ARC, SAMOS
Over the years, I have reviewed papers for the following journals:
- ACM Transactions on Reconfigurable Technology and Systems
- EURASIP Journal of Embedded Systems
- Journal of Signal Processing Systems
- IEEE Transactions on CAD of Integrated Circuits and Systems (TCAD)
- IEEE Transactions on Computers (TC)
- IEEE Transactions on Parallel and Distributed Systems
- IEEE Transactions on Signal Processing
I am member of the following organizations and communities:
- Senior Member of the IEEE
- Member of the ACM
- Member of the Hipeac
- Treasurer of the foundation "Stichting ter bevordering van het vakgebied Computer Engineering"
