Ph.D. Thesis
Topic
“A Multi-Dimensional Quantitative Prediction Model for Hardware/Software Partitioning and Design Space Exploration”
Description
An important step in Heterogeneous System Development is Hardware-Software Partitioning. This process involves exploring a huge design space. By using profiling to select hot-spots and estimate area and delay we can prune the design space considerably. In my Ph.D. thesis I develop a Multi-Dimensional Quantitative Prediction Model that makes early hardware predictions to prune the design space and support the partitioning process. The model, called Quipu, is based on Software Complexity Metrics, which capture important aspects of functions as control intensity, data intensity, and code size. It focusses on predicting area, delay, and interconnect measures.
For the scope of my thesis we identified the following goals:
- Development of a Quantitative Model for hardware area, delay, and interconnect estimation from a high level description.
- Identifying important characteristics and metrics of high level descriptions with respect to hardware complexity.
- Investigate different modelling techniques and defining specific models for the different predicted hardware measures.
- Integrating these models in existing tool chain(s) for reconfigurable architectures.
Related Projects
- hArtes - aims to lay the foundation for a new holistic (end-to-end) approach for complex real-time embedded system design, with the latest algorithm exploration tools and reconfigurable hardware technologies. My research is funded by this project.
- RCosy - aims to develop a semi-automatic tool to assist the designer in determining what functions should be considered for reconfigurable or mixed system implementation by profiling and hardware prototyping.
- Delft Workbench - a semi-automatic tool platform for integrated hardware-software co-design targeting heterogeneous computing systems containing reconfigurable components.
Related Topics
- Code Profiling and Cost Modeling for Reconfigurable Embedded Processor - Kamana Sigdel
- DWARV: DelftWorkbench Automated Reconfigurable VHDL Generator - Yana Yankova
- Programming Paradigms for Parallel Processing - S. Arash Ostadzadeh
Literature
I have published a bibliography at the literature page, accessible via the menu at the top of the page or here
