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Delft, University of Technology






The goal of the NANO CALCULUS research program is to investigate the potential of emerging nano devices and deep sub-micron (DSM) CMOS as seen from circuits and systems point of view. The research focusses on three main topics as follows:


Single electron based computation

This topic investages the possiblities to perform logic and arithmetic operations using the Single Electron Tunneling (SET) technology. As SET devices exhibit a behavior different from the CMOS transistor behavior, three levels of computation are considered: paradigm level, algorithm level and builing block level. New computation paradigms are needed in order to fully utilize the potential offered by SET technology. Once a new paradigm is defined, new algorithms are needed to efficiently perform logic and arithmetic operations into the paradigm context. Finally, to implement an algorithm basic building blocks need to be designed. (more information)


Variation, fault and error tolerance

This topic investigates ways to perform deterministic computation with unreliable devices. Current digital circuits are considered to be deterministic but in reality they exhibit a lot uncertainties, due to several kinds of variations. As CMOS is scaled down these problems increase and causes serious performance degradation or even might lead to faults. For emerging nano technology devices this problem is even more critical as they are based on quantum mechanical effects and therefore are probabilistic in nature. First of all, in this topic we seek a mechanism that is able to monitor delay variations and undertake appropriate counteractions with no or few performance loss. Second, we investigate fault and error tolerant computation platforms. (more information)


Computer aided design (CAD)

As many emerging nano devices exhibits different behavior and proporties than the current CMOS transistor they open up avenues for new computational paradigms. To pursue such avenues one needs design tools, but current design methodologies are not straightforward applicable for those emerging technologies. Moreover, the emerging technologies introduce a new aspect into design, namely unreliable components. Therefore in this topic we investigate new design methodologies to build reliable nano systems. The underlying idea is to develop architecural templates that embed support for reliability together with associated design methodologies and tools. (more information)