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Δ-ILIAD Publications

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Journal Articles

  1. Architectural Support for 3D Graphics in the Complex Streamed Instruction Set
    D. Cheresiz, B. Juurlink, S. Vassiliadis, and H. Wijshoff.
    Accepted for publication in the special issue of the International Journal of Parallel and Distributed Systems and Networks, ACTA Press, 2003.

  2. Multimedia Execution Hardware Accelerator.
    E. Hakkennes and S. Vassiliadis.
    Journal of VLSI Signal Processing, 28, July 2001

Conference Papers

  1. A Hierarchical Sparse Matrix Storage Format for Vector Processors
    Pyrrhos Stathis, Stamatis Vassiliadis and Sorin Cotofana
    To appear in Proceedings of IPDPS 2003, Nice, France, April 2003

  2. Architectural Support for 3D Graphics in the Complex Streamed Instruction Set
    D. Cheresiz, B. Juurlink, S. Vassiliadis, and H. Wijshoff.
    Proceedings of the 14-th IASTED Conference on Parallel and Distributed Computing Systems (PDCS).
    Cambridge, USA, 2002. (Best paper award in the area of processor architecture).

  3. Implementation of a Streaming Execution Unit
    D. Cheresiz, B. Juurlink, S. Vassiliadis, and H. Wijshoff.
    Proceedings of the EUROMICRO Symposium on Digital System Design, 2002 .

  4. Performance Scalability of Multimedia Instruction Set Extensions
    D. Cheresiz, B. Juurlink, S. Vassiliadis, and H. Wijshoff.
    Proceedings of the Euro-Par 2002 Conference.

  5. Direct and Transposed Sparse Matrix-Vector Multiplication
    Sorin Cotofana, Pyrrhos Stathis and Stamatis Vassiliadis
    Proceedings of MPCS 2002, Ischia, Italy, 2002

  6. Sparse Matrix Vector Multiplication Evaluation Using the BBCS scheme
    Pyrrhos Stathis, Sorin Cotofana, and Stamatis Vassiliadis
    Proceedings of PCI 8, Cyprus, 2001

  7. Implementation and Evaluation of the Complex Streamed Instruction Set
    B. Juurlink, D. Tcheressiz, S. Vassiliadis, and H. Wijshoff.
    Int. Conf. on Parallel Architectures and Compilation Techniques (PACT), 2001.

  8. Performance of the Complex Streamed Instruction Set on Image Processing Kernels
    D. Tcheressiz, B. Juurlink, S.Vassiliadis, and H. Wijshoff
    Proceedings of the Euro-Par 2001 Conference.

  9. BBCS Based Sparse Matrix Vector Multiplication: Initial Evaluation
    Stamatis Vassiliadis, Sorin Cotofana, and Pyrrhos Stathis
    Proceedings of 16th IMACS World Congress on Scientific Computation, Applied Mathematics and Simulation, Lausanne, Aug 2000

  10. Complex Streamed Instructions: Introduction and Initial Evaluation
    S. Vassiliadis, B. Juurlink, and E. Hakkennes
    Proceedings of the 26th EUROMICRO Conference.

  11. Counter Based Superscalar Instruction Issuing
    Sorin Cotofana, Ben Juurlink, and Stamatis Vassiliadis
    Proceedings of the 26th EUROMICRO Conference "Informatics: inventing the future". Maastricht, The Netherlands, September 5-7.

  12. Block Based Compression Storage Expected Performance
    Stamatis Vassiliadis, Sorin Cotofana, and Pyrrhos Stathis
    Proceedings of HPCS2000, Victoria, 2000

  13. Vector ISA Extension for Sprase Matrix Multiplication
    Stamatis Vassiliadis, Sorin Cotofana, and Pyrrhos Stathis
    Proceedings of EuroPar'99 Parallel Processing, pp. 708-715, Toulouse, 1999

  14. On the Design Complexity of the Issue Logic of Superscalar Machines
    Sorin Cotofana and Stamatis Vasiliadis
    in Proc. of Euromicro '98 Conference, (Veasteraas, Sweden), pp. 277-284, August 1998