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The programmer-visible registers of CSI are referred collectively to as the CSI register space. The CSI register space is depicted in Figure 6 and consists of the stream control registers (SCRs), the mask stream control registers (MSCRs), the stream status register (SSR), the integer packed accumulator register (pacc_int), and the floating-point packed accumulator register (pacc_fp).
Figure 6: The CSI register space.
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There are 96 32-bit stream control registers (SCRs) organized in 16 sets, 8 registers per set. Each set of the stream control registers, or SCR-set, contains the parameters that completely specify a CSI arithmetic stream, and, additionally, some parameters that specify the position of the current element when the stream is processed by a CSI instruction. The 48 32-bit mask stream control registers (MSCRs) are organized in 16 MSCR-sets, 3 registers per set, and are used to specify bitstreams. For a more detailed description of control registers and their function refer to the PACT-01 paper and the PDCS-02 paper The SSR register is used for control purposes, and the accumulation registers are used to facilitate parallel accumulations. Sizes of accumulation registers are implementation-dependent and determined by the parameter SIMD_width, which designates the width of the datapath of the CSI execution unit in bytes.