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CSI Architecture

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CSI Execution

Execution of a stream-processing CSI instruction involves performing the main operation, as well as all the associated tasks. First, the elements of the source streams are loaded. Then, if necessary, they are converted from the storage to the computation format (or, unpacked). Thereupon, the main operation is executed. After this, if required, the results are converted back to the storage format (packed), and, finally, stored.

Since CSI instructions operate on streams of arbitrary length, they can be rather long-running. Therefore, it is undesirable if program interruptions would result in termination of the instruction being executed. CSI provides a restart mechanism which allows to interrupt an instruction and resume its execution from the point of interruption. The mechanism is based on the ideas used in the IBM System 390 Vector Architecture. Execution of a CSI instruction is represented as a sequence of units of operation (UOPs). At each UOP, a certain fixed number of consecutive stream elements is processed. If the elements are successfully processed, some of the control registers from the corresponding SCR/MSCR-sets are automatically updated, so that they specify the positions of the elements to be processed in the next UOP. If an exception has occurred during processing of the current UOP and the OS intervention is needed, the control registers are not updated. Therefore, the instruction can be interrupted, and its execution can be resumed from the current UOP after control is returned to the interrupted program. For an arithmetic stream, the position of the first stream element processed in the current UOP is determined by the Base, CurrRow, and CurrCol registers of the corresponding SCR-set.

We illustrate how these SCRs are updated using the arithmetic stream depicted in Figure 5 Suppose that a single element is processed in each UOP, and that the last element of the first row is processed in the current UOP. Then, prior to the UOP execution, the control registers of the SCR-set that describes the stream have the following values: Base=30, CurrRow=0, CurrCol=3 (rows and columns are numbered from zero). When the UOP is successfully completed, these SCRs are updated as follows: Base=50, CurrRow=1, CurrCol=0, and will point to the first element of the second row. Similarly, for a CSI bitstream, the position of the first element processed in the current UOP is determined by the Base and CurrElem control registers. The number of elements processed in each UOP is determined by the current CSI mode of operation, which can be either the CSI sequential or the CSI parallel. In the sequential mode, a single element of each operand stream is processed in an UOP, while In the parallel mode, several elements are processed in parallel by a single UOP. Sequential mode is provided for debugging purposes because it allows to identify exactly which element has cause an exception.