VYZAS

(VLSI High Yield - Zero defect Advanced Embedded Systems)

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PhD

 

2007
  1. G. N. Gaydadjiev, Testing of Modern Semiconductor Memory Structures, pp. 140, September 2007, PhD Thesis (BibTeX)

  2. I. Sourdis, Designs and Algorithms for Packet and Content Inspection, Delft, December 2007, ISBN 978-90-807957-8-5, PhD Thesis (BibTeX)

  3. R. Chaves, Secure Computing on Reconfigurable Systems, pp. 207, December 2007, PhD Thesis (BibTeX)

  4. D.R.H. Calderón, Arithmetic Soft-Core Accelerators, November 2007, PhD Thesis (BibTeX)

2005
  1. Z. Al-Ars, DRAM Fault Analysis and Test Generation, June 2005, ISBN 90-9019612-9, PhD Thesis (BibTeX)

2004
  1. J. Nikara, Application-Specific Parallel Structures for Discrete Cosine Transform and Variable Length Decoding, Tampere, Finland, June 2004, PhD Thesis (BibTeX)

2003
  1. M.J. Geuzebroek, Test Point Insertion to improve BIST performance, and to reduce ATPG test time and data volume, pp. 216, TU Delft, The Netherlands, May 2003, PhD Thesis (BibTeX)

MSc

2011
  1. D. Siskos, A Co-processor for a Secure Implantable Medical Device, March 2011, MSc Thesis (BibTeX)

  2. S. Keyser, Modular RT-Motion USB, pp. 80, February 2011, CE-MS-2011-01, MSc Thesis (BibTeX)

2010
  1. A. Abi Khaled, Congestion Managment with Feedback Queue, Delft, the Netherlands, September 2010, TU Delft, CE, MSc Thesis (BibTeX)

  2. A Piplani, Stereoscopic Remote Vision System, pp. 100, August 2010, CE-MS-2010-24, MSc Thesis (BibTeX)

  3. S.H. Katamaneni, Longest Pre x Match and Incremental Updates for Range Tries, Delft, The Netherlands, August 2010, TU Delft, MSc Thesis (BibTeX)

  4. J. Verbree , On 3D Stacked IC Yield Improvement and 3D-DfT Test Architecture, On 3D Stacked IC Yield Improvement and 3D-DfT Test, July 2010, MSc Thesis (BibTeX)

  5. S Tzilis, Fine-Grain Runtime Fault Diagnosis for Reconfigurable Logic Blocks, Delft, The Netherlands, June 2010, (TU Delft), MSc Thesis (BibTeX)

  6. D. Stafylarakis, Security in RFID systems, May 2010, MSc Thesis (BibTeX)

  7. A. Noroozi, Evaluation Methodology and Systematic Selection of Microcontrollers for Delfi-n3Xt Nanosatellite, pp. 151, May 2010, CE-MS-2010-07, MSc Thesis (BibTeX)

  8. Kentie, Biological Sequence Alignment Using Graphics Processing Units, November 2010, MSc Thesis (BibTeX)

  9. D. P. Riemens, Exploring Suitable Adder Designs for Biomedical Implants, pp. 167, October 2010, MSc Thesis (BibTeX)

2009
  1. M. Abikhaled, Code Integrity Check targeted on RISC, pp. 74, September 2009, MSc Thesis (BibTeX)

  2. D. Mastenbroek, WATCH-OVER; A cooperative approach on vulnerable road user protection, August 2009, MSc Thesis (BibTeX)

  3. M.R. van der Leije, FPGA harware acceleration of co-occurring aberrations in aCHG data, August 2009, MSc Thesis (BibTeX)

  4. N.E. Cornejo, Fault Detection for the Delfi Nanosatellite Programme, pp. 116, July 2009, CE-MS-2009-12 (with distinction), MSc Thesis (BibTeX)

  5. D. Hartanto, Reliable Ground Segment Data Handling System for Delfi-n3Xt Satellite Mission, pp. 207, Delft, The Netherlands, July 2009, CE-MS-2009-14, MSc Thesis (BibTeX)

  6. G. Stefanakis, Design and Implementation of a Range Trie for Address Lookup, pp. 132, July 2009, (with distinction), MSc Thesis, cum laude (with distinction) (BibTeX)

  7. F. Lemmel, The Brandaris128 Camera, pp. 108, June 2009, CE-MS-2008-05, MSc Thesis (BibTeX)

  8. R. de Smet, Range Trie Heuristics for Variable-Size Address Region Lookup, Delft, The Netherlands, May 2009, MSc Thesis (BibTeX)

  9. W. Chim, A Flexible Electronic Paper with Integrated Display Driver using Single Grain TFT Technology, February 2009, MSc Thesis (BibTeX)

  10. Z. Ahyadi, Experimental Analysis on ECC Schemes for Fault-Tolerant Hybrid Memories, December 2009, MSc Thesis (BibTeX)

  11. K. Chandrasekar, Performance Validation of Networks on Chip, pp. 88, November 2009, CE-MS-2009-08, MSc Thesis (BibTeX)

  12. A. Thomas, IWEX Mapping on current high performance architectures, Delft, The Netherlands, October 2009, MSc Thesis (BibTeX)

2008
  1. C. Li, Testing of Deep-Submicron Embedded Memories in FPGAs, August 2008, MSc Thesis (BibTeX)

  2. S. Kootkar, Reliable Sensor Networks: A Case Study in Commuter Trains, July 2008, MSc Thesis (BibTeX)

  3. A. Arelakis, Efficient Pre-filtering Techniques for Packet Inspection, December 2008, MSc Thesis (BibTeX)

  4. GH Nazarian, On-line Testing of Routers in Networks-on-Chips, December 2008, MSc Thesis (BibTeX)

  5. D. Zhu, Profiling Symmetric Encryption Algorithms for Implantable Medical Devices, December 2008, MSc Thesis (BibTeX)

  6. F.N. Fomin, Experimental Analysis Of Design-For-Testability Techniques in SRAM, October 2008, MSc Thesis (BibTeX)

2007
  1. S. Umrani, Communication-centric Debugging of Systems on Chip using Networks on Chip, pp. 106, August 2007, MSc Thesis (BibTeX)

  2. J. Hofman, Speeding up MPEG-4 colorspace conversion, pp. 127, April 2007, MSc Thesis (BibTeX)

  3. A van den Berg, Automation of wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism in a chip, pp. 110, November 2007, MSc Thesis (BibTeX)

2006
  1. N.T. Quach, Real-time Sky-detection Implementation, pp. 119, September 2006, CE-MS-2006-04, MSc Thesis (BibTeX)

  2. J. H. Bonarius, Low Power Techniques for Computer Architectures, pp. 82, August 2006, CE-MS-2006-14, MSc Thesis (BibTeX)

  3. M. Imran, Using COTS components in space applications, pp. 115, August 2006, CE-MS-2006-09, MSc Thesis (BibTeX)

  4. F. J. Bouwens, Power and Performance Optimization for ADRES, pp. 147, August 2006, CE-MS-2006-12, MSc Thesis (BibTeX)

  5. D.C. Spitzer, A Configurable FPGA-based, Publish/Subscribe Network System, July 2006, MSc Thesis (BibTeX)

  6. D. Vermoen, Reverse engineering of Java Card applets using power analysis, pp. 84, June 2006, CE-MS-2006-05, MSc Thesis (BibTeX)

  7. B.G.C. de Ruijsscher, FPGA based accelerator for real-time skin segmentation, pp. 101, June 2006, CE-MS-2006-08, MSc Thesis (BibTeX)

  8. V. van Adrighem, Tiny Linux kernel for minimalistic embedded systems, pp. 80, April 2006, CE-MS-2006-01, MSc Thesis (BibTeX)

  9. H. J. Visser, Minimalistic Platform for Linux Enabled Embedded Systems, pp. 95, April 2006, CE-MS-2006-02, MSc Thesis (BibTeX)

  10. P. Ren, Wrapper design for the reuse of a NoC or other functional interconnect as test infrastructure, pp. 105, December 2006, CE-MS-2006-18, MSc Thesis (BibTeX)

2005
  1. Y Zhao, Benchmarking and Profiling the RSVP Protocol, August 2005, MSc Thesis (BibTeX)

  2. C. Strydis, Implantable microelectronic devices, July 2005, (with distinction), MSc Thesis (BibTeX)

  3. v/d Waal, Motion estimation algorithms with reduced memory bandwidth requirements and motion vector candidate evaluations, June 2005, MSc Thesis (BibTeX)

  4. M. Chen, H/W Architecture Design for the Publish and Subsrcibe Mechanism, Delft, The Netherlands, June 2005, MSc Thesis (BibTeX)

  5. D. Borodin, Optimisation of Multimedia Applications for the Philips Wasabi Multiprocessor System, June 2005, MSc Thesis (BibTeX)

  6. M. Ma, Developing and Implementing Phase Normalization and Peak Detection for Real-Time Image Registration, Delft, The Netherlands, June 2005, MSc Thesis (BibTeX)

  7. G. de Goede, Accelerating the XviD IDCT on DAMP, January 2005, (with distinction), MSc Thesis (BibTeX)

2004
  1. X. Li, 3D-TV Rendering on a Multiprocessor on a Chip, pp. 43, August 2004, MSc Thesis (BibTeX)

  2. M. P. Mul, PDP8 meets USB, August 2004, MSc Thesis (BibTeX)

  3. Z Chang, VoIP Jitter Buffer Algorithm Improvement for Wireless Environment, pp. 55, August 2004, MSc Thesis (BibTeX)

  4. J. van de Pol, USB-enabled PDP8 computer, pp. 99, June 2004, CE-MS-2004-04, MSc Thesis (BibTeX)

  5. J. Van der Vegt, Simulator-based exploration of the memory hierarchy for data dominated applications, pp. 84, May 2004, CE-MS-2004-01, MSc Thesis (BibTeX)

  6. P.T. Groen, Hardware Acceleration of the SRP Authentication Protocol, pp. 78, March 2004, MSc Thesis (BibTeX)

  7. S. Suijkerbuijk, Performance Evaluation of Interleaved Multithreading in VLIW Architectures, pp. 80, October 2004, MSc Thesis (BibTeX)

  8. J. Eilers, DAMP: Design of the Delft Altera-based Multimedia Platform, October 2004, CE-MS-2003-05, MSc Thesis (BibTeX)

  9. W. Zwart, TR-DAMP: Testing and redesigning the Delft Altera-based Multimedia Platform, October 2004, CE-MS-2003-06, MSc Thesis (BibTeX)

2003
  1. D. Bao Linh, Vectorization of Digital Filters for CVP, pp. 99, TU Delft, the Netherlands, July 2003, MSc Thesis (BibTeX)

  2. A. Snirpunas, Mapping of Motion Estimation on a VLIW Processor Template, Delft, The Netherlands, July 2003, MSc Thesis (BibTeX)

2002
  1. B. Zafarifar, Microcodable Discrete Wavelet Transform, August 2002, MSc Thesis (BibTeX)

 

 



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