NOTE: The MOLEN prototype support for Virtex2-Pro is discontinued due to the work done on upgrading the prototype to the latest version of compilers, Xilinx tools and development boards. The old design will be kept here for reference, but the MOLEN compiler will no longer be available. Please contact us for further information.

The Molen prototype is a free to use reconfigurable design platform based on the Xilinx Virtex II Pro technology. The design files and templates are available for free download from this page. The prototype allows experiments with various designs of reconfigurable units referred to as Custom Computing Units (CCUs). Further details on the Molen prototype can be found here. For more extensive information on the Molen processing paradigm check all related publications.

Who is it for?

The Virtex II Pro prototype is intended for researchers and designers, both from the academia and the industry, willing to accelerate software applications with reconfigurable hardware. The design framework allows a designer to concentrate on the design of the reconfigurable hardware accelerators (CCUs) as the implemented prototype infrastructure controls all synchronization tasks and the communications between the software (i.e., the PowerPC) and the reconfigurable accelerator. The prototype computational scheme guarantees performance efficient operation and the proposed methodology allows short design cycle.

How to Use the Prototype?

The fastest way to learn how to use this Molen prototype is to go through the step-by-step tutorial following the examples. Additionally, detailed and comprehensive README.txt files can be downloaded along with the framework design files from here.

Prerequisites (what you need beforehand):

The application program code in C language as an input to the Molen PowerPC compiler .
The function of interest for implementation in reconfigurable hardware identified in the software code.
A functionally equivalent and synthesizable HDL description (VHDL or Verilog) of the identified software function.

What else do you need?

Install the design tools required and follow some useful links, closely related to the recommended modular design flow by Xilinx. Make sure you have a Xilinx Virtex II Pro evaluation board. Our designs have been tested on the following boards: XUP V2P (xc2vp30 chip); ADM- XPL (xc2vp20 chip). Mapping the prototype design on other Virtex II Pro based boards is also possible, but would require deeper understanding of the Xilinx tools.

Step-by-step guide

To help you get started, we have installed an easy to follow guide describing step-by-step how the entire process of installing, compiling, designing your hardware, putting the hardware and software together, and experimenting work altogether.

Design flow

References:

S. Vassiliadis, S. Wong, G. N. Gaydadjiev, K. Bertels, G.K. Kuzmanov, E. Moscu Panainte, The Molen Polymorphic Processor, IEEE Transactions on Computers, pp. 1363- 1375, November 2004, Volume 53, Issue 11 (BibTeX)
E. Moscu Panainte, K. Bertels, S. Vassiliadis, The PowerPC Backend Molen Compiler, in 14th International Conference on Field-Programmable Logic and Applications (FPL), pp. 434-443, Antwerp, Belgium, September 2004, Springer-Verlag Lecture Notes in Computer Science (LNCS), vol. 3203 (BibTeX)
G.K. Kuzmanov, G. N. Gaydadjiev, S. Vassiliadis, The Virtex II Pro MOLEN Processor, Proceedings of the 4th International Workshop on Computer Systems: Architectures, Modelling, and Simulation (SAMOS 2004), pp. 192-202, Samos, Greece, July 2004, LNCS 3133 (BibTeX)
S. Vassiliadis, S. Wong, S. D. Cotofana, The MOLEN ρ μ-coded Processor, in 11th International Conference on Field-Programmable Logic and Applications (FPL), Springer-Verlag Lecture Notes in Computer Science (LNCS) Vol. 2147, pp. 275-285, Belfast, UK, August 2001 (BibTeX)

Design Tools Required:

ISE 6.3i design environment

Useful Links:

Modular Design Overview: http://toolbox.xilinx.com/docsan/xilinx7/books/data/docs/dev/dev0025_7.html

Prototype Specifications

Program memory: 64KB in BRAM
Data memory: 64KB in BRAM
Three Molen Instructions - execute, movtx, movfx
Comprehensive interface for CCU implementations
512 XREGs 32 bits each
Maximum PowerPC clock rate 300MHz*
Memory clock 100MHz*
Three clock domains available for CCUs

* frequencies for chip speed grade -6

Downloads

The MOLEN PPC C compiler

Compile your application (support discontinued due to upgrade work)

Read how

	Virtex II Pro Molen Design Files - ISE 6.3i	Read first
	ADM- XPL board files Download (2 MB) - xc2vp20 chip	Read me
	XUP V2P board files - xc2vp30 chip 80 MHz Download (2 MB) 100 MHz Download (2 MB)	Read me

	Virtex II Pro Molen Design Files - ISE 8.1/8.2	Read first
	XUP V2P board files - xc2vp30 chip 100 MHz Download (3.2 MB)	Read me

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Contact Person: G.Kuzmanov@ewi.tudelft.nl