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ARACHNE Research Theme

Computer Engineering

Delft University of Technology

  
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Papers

2010

  1. M. Ahmadi, A. Shahbahrami, S. Wong, Collaboration of Reconfigurable Processors in Grid Computing for Multimedia Kernels, Proceedings of the 5th International Conference on Grid and Pervasive Computing, Hualien, Taiwan, May 2010 (BibTeX)

  2. , December 2010 (BibTeX)

  3. R. Hassanpour, A. Shahbahrami, S. Wong, Hand Segmentation by Fusing 2D and 3D Data, The 2nd International Conference on Computer modeling and simulation (iccms 2010), January 2010 (BibTeX)

  4. M Duranton, S. Yehia, B De Sutter, K De Bosschere, A Cohen, B Falsafi, G. N. Gaydadjiev, M. Katevenis, O. Temam, M. Valero, The HiPEAC Vision, High Performance and Embedded Architecture and Compilation, pp. 1-56, ICT-217068, Europe, January 2010 (BibTeX)

2009
  1. M. Ahmadi, S. Wong, K-Stage Pipelined Bloom Filter for Packet Classification, The 7th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC-09), pp. 64-70, Vancouver, Canada, August 2009 (BibTeX)

  2. R. Choupani, S. Wong, M. Tolun, Multiple Description Scalable Coding for Video Transmission over Unreliable Networks, proceedings of the International Symposium on Systems, Architectures, MOdeling and Simulation, Samos, Greece, July 2009 (BibTeX)

  3. R. Choupani, S. Wong, M. Tolun, A Drift-Reduced Hierarchical Wavelet Coding Scheme for Scalable Video Transmissions, First International Conference on Advances in Multimedia, Colmar, France, July 2009 (BibTeX)

  4. A. Shahbahrami, M. Ahmadi, S. Wong, K.L.M. Bertels, A New Approach to Implement Discrete Wavelet Transform using Collaboration of Reconfigurable Elements, proceedings of international conference on ReConFigurable Computing and FPGAs, pp. 344-349, Cancun, Mexico, December 2009 (BibTeX)

2008
  1. C. Kachris, S. Wong, S. Vassiliadis, Design and Performance Evaluation of an Adaptive FPGA for Network Applications, Microelectronics Journal, pp. 1-8, July 2008, doi:10.1016/j.mejo.2008.05.011 (BibTeX)

  2. K. Tatas, T. Trancoso, E. Evripidou, S. Wong, Rapid Prototyping of the Data-Driven Chip-Multiprocessor (D2-CMP) using FPGAs, Parallel Processing Letters (PPL),Vol: 18 Issue: 2, pp. 291-306, June 2008, DOI: 10.1142/S0129626408003399 (BibTeX)

  3. M. Ahmadi, S. Wong, An Approach for Optimal Bandwidth Allocation in Packet Processing systems, Proceedings of sixth Annual IEEE/ACM conference on Communication Networks and Services Research 2008 (CNSR 2008), pp. 208-214, Halifax, Canada, May 2008 (BibTeX)

  4. M. Ahmadi, S. Wong, A Memory-optimized Bloom Filter using An Additional Hashing Function, Accepted for publication to appear in proceedings of IEEE Globecom 2008 Next Generation Networks, Protocols, and Services Symposium, New Orleans, USA, December 2008 (BibTeX)

  5. M. Ahmadi, S. A. Ostadzadeh, S. Wong, Rule-set Database Inspection: Towards Data Utilization in Packet Processing, Proceedings of International Conference on the Latest Advances in Networks, Toulouse, France, December 2008 (BibTeX)

  6. S. Wong, M. Ahmadi, Reconfigurable Architectures in Collaborative Grid Computing: An Approach, Proceedings of the Second International conference on Networks for Grid Applications (GridNets 2008), Beijing, China, October 2008 (BibTeX)

2007
  1. C. Kachris, S. Vassiliadis, A Reconfigurable Platform for Multi-Service Edge Routers, Proceedings of the 20th ACM Conference on Integrated Circuits and Systems Design, pp. 165-170, Rio de Janeiro, Brazil, September 2007 (BibTeX)

  2. S.D. Breijer, F. Duarte, S. Wong, An OCM Based Shared Memory Controller For Virtex 4, Proceedings of 17th International Conference on Field Programmable Logic and Applications (FPL07), pp. 692--696, Amsterdam, The Netherlands, August 2007 (BibTeX)

  3. S. Vassiliadis, F. Duarte, S. Wong, A Load/Store Unit for a memcpy Hardware Accelerator, Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL07), pp. 537--541, Amsterdam, The Netherlands, August 2007 (BibTeX)

  4. C. Kachris, S. Vassiliadis, Design Space Exploration of Configuration Manager for Network Processing Applications, Proceedings of IEEE International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS 07), pp. 34-40, Samos, Greece, July 2007 (BibTeX)

  5. F. Duarte, S. Wong, A memcpy Hardware Accelerator Solution for Non Cache-line Aligned Copies, Proceedings of 18th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP07), Montréal, Canada, July 2007 (BibTeX)

  6. R. Guo, J. G. Delgado-Frias, S. Wong, Cache Replacement Policies for IP Address Lookups, Proceedings of The Fifth IASTED International Conference on Circuits, Signals, and Systems, pp. 70-75, Banff, Alberta, Canada, July 2007 (BibTeX)

  7. C. J. Glossner, D. Iancu, M. Moudgill, M. J. Schulte, S. Vassiliadis, Trends in Low Power Handset Software Defined Radio, proceedings of SAMOS 2007, pp. 313-321, Samos, Grece, July 2007, LNCS 4599 (BibTeX)

  8. C. Kachris, C. Kulkarni, Configurable Transactional Memory, Proceedings of 15th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 07), pp. 65-72, Napa, CA, USA, April 2007 (BibTeX)

  9. M. Ahmadi, S. Wong, Modified Collision Packet Classification Using CountingBloom Fillter In Tuple Space, Proceedings of the 25th IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN 2007), pp. 70-76, Innsbruck, Austria, February 2007 (BibTeX)

  10. M. Ahmadi, S. Wong, Hashing Functions Performance in Packet Classification, Proceedings of International Conference on the Latest Advances in Networks (ICLAN-2007), pp. 127-132, Paris, France, December 2007 (BibTeX)

  11. M. Ahmadi, S. Wong, A Cache Architecture for Counting Bloom Filters, Proceedings of 15th IEEE International Conference on Networks (ICON2007), pp. 218-223, Adelaide, Australia, November 2007 (BibTeX)

  12. M. Ahmadi, S. Wong, A Performance Model for Network Processor Architectures in Packet Processing Systems, Proceedings of the 19th International Conference on Parallel and Distributed Computing and Systems (PDCS 2007), pp. 176-181, Cambridge, Massachusetts, USA, November 2007 (BibTeX)

2006
  1. L. Mhamdi, M. Hamdi, C. Kachris, S. Wong, S. Vassiliadis, High-performance switching based on buffered crossbar fabrics, Computer Networks Journal, pp. 2271-2285, September 2006, Vol. 50, No. 13 (BibTeX)

  2. C. Kachris, S. Vassiliadis, A Dynamically Reconfigurable Queue Scheduler, Proceedings of the 16th IEEE International Conference on Field Programmable Logic and Applications, FPL06, Madrid, Spain, August 2006 (BibTeX)

  3. S. Vassiliadis, I. Sourdis, FLUX Networks: Interconnects on Demand, Int. Conf. on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS), pp. 160-167, Samos, Greece, July 2006 (BibTeX)

  4. C. Kachris, S. Vassiliadis, Performance Evaluation of an Adaptive FPGA for Network Applications, Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping, pp. 54-62, Chania, Greece, June 2006 (BibTeX)

  5. L. Mhamdi, S. Vassiliadis, Integrating Uni- and Multicast Scheduling in Buffered Crossbar Switches, IEEE Workshop on High Performance Switching and Routing (HPSR), pp. 99-104, Poznan, Poland, June 2006 (BibTeX)

  6. C. Kachris, S. Vassiliadis, Analysis of a Reconfigurable Network Processor, 13th Reconfigurable Arcitectures Workshop (RAW 06), IEEE IPDPS, pp. 1-8, Rhodos, Greece, April 2006 (BibTeX)

  7. L. Mhamdi, C. Kachris, S. Vassiliadis, A reconfigurable hardware based embedded scheduler for buffered crossbar switches, ACM/SIGDA Fourteenth International Symposium on Field Programmable Gate Arrays (FPGA 2006), pp. 143 - 149, Monterey, CA, USA, February 2006 (BibTeX)

  8. S. Vassiliadis, I. Sourdis, Reconfigurable FLUX Networks, IEEE International Conference on Field Programmable Technology (FPT), pp. 81-88, December 2006 (BibTeX)

  9. J. C. Bispo, I. Sourdis, J. M.P. Cardoso, S. Vassiliadis, Regular Expression Matching for Reconfigurable Packet Inspection, IEEE International Conference on Field Programmable Technology (FPT), pp. 119-126, December 2006 (BibTeX)

  10. I. Sourdis, V. Dimopoulos, D.N. Pnevmatikatos, S. Vassiliadis, Packet Pre-filtering for Network Intrusion Detection, in 2nd ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), pp. 183-192, San Jose, California, December 2006 (BibTeX)

  11. S. Wong, F. Duarte, S. Vassiliadis, A Hardware Cache memcpy Accelerator, Proceedings of IEEE International Conference on Field Programmable Technology (FPT06), pp. 141-147, Bangkok, Thailand, December 2006 (BibTeX)

  12. C. Kachris, S. Vassiliadis, Design of a Web Switch in a Reconfigurable Platform, ACM/IEEE Symposium on Architectures for Networking and Communications Systems, pp. 31-40, San Jose, CA, USA, December 2006 (BibTeX)

  13. S. Vassiliadis, I. Sourdis, Reconfigurable Fabric Interconnects, in Int. Symposium on System-on-Chip (SoC), pp. 41-44, Tampere, Finland, November 2006 (BibTeX)

2005
  1. I. Sourdis, D.N. Pnevmatikatos, S. Wong, S. Vassiliadis, A Reconfigurable Perfect-Hashing Scheme for Packet Inspection, proceedings of 15th International Conference on Field Programmable Logic and Applications (FPL 2005), pp. 644-647, Tampere, Finland, August 2005 (BibTeX)

2004
  1. L. Mhamdi, M. Hamdi, Scheduling Multicast Traffic in Internally Buffered Crossbar Switches, IEEE International Conference on Communications, (ICC 04), pp. 1103 - 1107, Paris, France, June 2004, Vol. 02 (BibTeX)

  2. I. Sourdis, D.N. Pnevmatikatos, Pre-decoded CAMs for Efficient and High-Speed NIDS Pattern Matching, IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), pp. 258-267, Napa CA, USA, April 2004 (BibTeX)

2003
  1. L. Mhamdi, M. Hamdi, MCBF: A High-Performance Scheduling Algorithm for Buffered Crossbar Switches, IEEE Communications Letters, pp. 451-453, September 2003, Vol. 07 No. 09 (BibTeX)

  2. G. Lykakis, N. Mouratidis, K. Vlachos, N. Nikolaou, S. Perissakis, I. Sourdis, G. Konstantoulakis, D.N. Pnevmatikatos, D. Reisis, Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip, Design, Automation and Test in Europe (DATE 2003), pp. 20014-20019, Messe Munich, Germany, March 2003 (BibTeX)

2001
  1. S. Vassiliadis, S. Wong, S. D. Cotofana, Network Processors: Issues and Prospectives, in Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA-2001), pp. 1827-1833, Las Vegas, NV, USA, June 2001 (BibTeX)

2000
  1. F.J. Gutierrez, E. Varvarigos, S. Vassiliadis, Multi-cost routing in Max-Min fair share networks, Proceedings. Vol. 2. 38th Annual Allerton Conference on Communication, Control and Computing, pp. 1294-1304, Monticello, Illinois, October 2000, cat. c, Projectcode: ET01-05 (BibTeX)